leaked-amd-mendocino-block-diagram-reveals-its-unique-chip-architecture

Hardware fanatics of a sure classic will turn out to be misty-eyed and nostalgic once they hear the phrase “Mendocino.” That may be precisely why AMD picked that codename for its personal cut-down, low-cost Ryzen processors. Officially introduced at Computex and supposed for functions where price is a very powerful issue, Mendocino is the codename for a collection of chips that tops out at 4 Zen 2 cores with hooked up RDNA 2 graphics.

On the face of it, that description sounds so much just like the “Aerith” (aka Van Gogh) SoC inside Valve’s Steam Deck handheld. However, if the most recent info is correct, Mendocino is sort of a bit totally different from Aerith. For starters, whereas each use RDNA 2 graphics, a Mendocino die contains only a quarter of the GPU compute in comparison with Aerith; a single Navi Workgroup Processor, totaling two compute items for a most of 128 shaders.
Image: Olrak on Twitter

Furthermore, the slide above—unearthed by Olrak (@Olrak29_ on Twitter)—appears to point that Mendocino’s Zen 2 cores aren’t precisely the identical as these featured in Aerith and different merchandise based mostly on Zen 2, just like the Xbox Series X, PlayStation 5, and naturally, the corporate’s Ryzen 3000-series processors.

For starters, the L3 cache on this chip has been slashed from 16MB (per-CCX on different Zen 2 elements) to simply 4MB. It additionally appears to have had half of its floating-point compute means lopped off. Zen 2 elements usually have 4 floating-point pipes, however this diagram, if legit, appears to point that Mendocino’s cores will solely have two. That will severely damage efficiency in crunchy, branchy floating-point code, however the markets these chips are meant for do not do numerous that form of computing anyway.

Another large change that can notably impression video games on a tool outfitted with one in every of these chips—like, say, the AYANEO Air Plus—is the discount in reminiscence bus width. Mendocino has two 32-bit LPDDR5 reminiscence channels. Before you say, ‘nicely that is dual-channel; is not that the identical as desktop elements?’, keep in mind that DDR5 DIMMs usually have two channels per module—a so-called dual-channel setup on a DDR5 desktop really has 4.

So saying, even when a Mendocino system had been outfitted with extraordinarily quick LPDDR5-6400 reminiscence, it is solely taking a look at about 51 GB/sec of reminiscence bandwidth. That’s barely greater than half of what the Steam Deck manages due to its full-sized 128-bit reminiscence bus. That 51 GB/sec must be shared with the 4 Zen 2 cores, too, and their small cache signifies that they will must dip out to foremost reminiscence extra usually as nicely.

To summarize, Mendocino actually is a processor created to be as cost-effective as potential, simply as Dr. Su stated at Computex. It has cuts to its Zen 2 cores and their related cache, it has a slim reminiscence bus to simplify product implementations, and it has an especially tiny 2-CU RDNA 2 GPU, in keeping with the leaked slide..

Despite all that, we’re really fairly assured that it’s going to nonetheless carry out nicely in its supposed market of schooling and low-powered units. We do must admit that we’re curious to see the impression of the incisions AMD made to chop prices, although. If we get our fingers on such a system, we’ll put it by its paces and report again.