intel-&-sifive-demo-excessive-efficiency-risc-v-horse-creek,-constructed-on-intel-4-course-of

Intel revealed in 2021 the evolution of the Horse Creek Platform, a collaboration with SiFive to design a brand new high-performance RISC-V growth system as a part of the corporate’s Intel Foundry Companies (IFS) and their effort to push the adoption of RISC-V. The boards had been declared to persist SiFive’s HiFive growth boards developed to increase the RISC-V ecosystem and rev up prototyping.

Earlier this 12 months, Intel reported the IFS Accelerator ecosystem partnership was created to help in accelerating chip prototyping and tape-outs through deep affiliation with various semiconductor allies throughout design companies, EDA, and IPs.

The IFS Accelerator is an exhaustive assortment of instruments, together with a silicon-verified Intel-process-specific optimized IP portfolio, std cell library, reminiscence, GP I/O, analog, and I/F IPs. An intensive and dynamic ecosystem will likely be essential for the success of Intel’s multi-year foundry plan, and IFS Accelerator is a part of that technique. The corporate created the IFS Accelerator in September 2021 to assist the automotive trade in transitioning to extra cutting-edge nodes. Nevertheless, it has since widened its endeavor into different sectors.

Intel & SiFive Demo High-Performance RISC-V Horse Creek, Built On Intel 4 Process 2

Picture source: WikiChip Fuse

SiFive will allow IFS clients to create computing platforms that includes RISC-V, optimized for his or her market purposes. Intel’s broad portfolio of IP compliments the SiFive portfolio of performance-driven processor IP such because the SiFive Intelligence and SiFive Efficiency households of processor IP.

— SiFive

On the Intel Innovation 2022 Convention, the corporate publicly demonstrated Horse Creek, a Raspberry Pi-inspired RISC-V software program growth board. Horse Creek is extra intensive than different RISC-V boards attributable to its quite a few built-in interfaces. The board consists of 8GB of DDR5 reminiscence, a PCIe 5.0 slot, SPI Flash incorporating the U-Boot, and a number of monitoring and debugging interfaces.

Intel & SiFive Demo High-Performance RISC-V Horse Creek, Built On Intel 4 Process 3

Picture source: WikiChip Fuse

Over the past eighteen months, Horse Creek went from the corporate’s preliminary announcement to a working A0 stepping chip operating the Linux working system. The system-on-a-chip (SoC) blends many superior interfaces and a mix of quad-core SiFive P550 RISC-V cores. Fabricated on the corporate’s most state-of-the-art Intel 4 course of, the die measures 4 mm x 4 mm and is encapsulated in a 19 mm x 19 mm BGA package deal. The die additionally plans to indicate third-party controllers and IPs interoperability with Intel’s arduous IP PHYs.

Intel & SiFive Demo High-Performance RISC-V Horse Creek, Built On Intel 4 Process 4

Picture source: WikiChip Fuse

Every quad-core SiFive P550 RISC-V core options distant L1 and L2 caches with a shared last-level cache performing at 2.2GHz. After the announcement, these had been the highest-functioning RISC-V efficiency cores. The SoC incorporates Intel’s PCIe Gen5 PHY with eight lanes and the Synopsys PCIe 5.0 Controller. It additionally combines Intel’s DDR5 PHYs sustaining 5600 MT/s charges and Cadence’s proprietary reminiscence controller. Further Intel 4 IPs embody 2MB of shared SRAM (a side of the reminiscence compiler), caches, digital fuses, course of monitor, Energy/Clock/PLLs, JTAG, and various cell libraries.

intel-horse-creek-soc-wc

intel-horse-creek-chip-linux-wc

2 of 9

Horse Creek boots into the Linux OS, and Intel demonstrated the chip operating a online game with out using a graphics card together with totally different purposes, akin to a media participant. browser, and extra.

intel-pathfinder-1-wc

intel-pathfinder-2-wc

intel-pathfinder-3-wc

2 of 9

Final month, Intel reported the Intel Pathfinder for RISC-V, an instantaneous prototyping growth surroundings for integrating into methods. Intel Pathfinder is a set of IPs, middleware, open-source and third-party instruments, and working system help developed to streamline the investigation of pre-silicon RISC-V-based strategies. Intel is partnering with business and open-source RISC-V IP suppliers to domesticate a secure surroundings for software program growth spanning totally different RISC-V-based CPUs.

Commercially, the RISC-V core IPs embody these from Andes, Codasip, MIPS, SiFive, and different organizations. Pathfinder possesses a number of FPGA platforms for RISC-V chip emulations. The starter version employs the Terasic Developer Equipment for Intel Pathfinder, and the business implements embody boards primarily based on the Stratix 10 GX for optimum chip emulation skills.

Intel & SiFive Demo Excessive-Efficiency RISC-V Horse Creek, Constructed On Intel 4 Course of

Picture source: WikiChip Fuse

The supply date for the brand new Horse Creek Dev boards has but to be introduced.

Information Source: WikiChip Fuse