Let’s be frank: it was a nice shock when AMD’s Radeon RX 6000-family graphics playing cards had been in a position to present strong competitors for (and even outpace, at instances) NVIDIA’s GeForce RTX 3000 sequence. The RX Vega sequence, whereas competent, did not reside as much as its promise, and the first-generation RDNA-based Radeon playing cards within the RX 5000 sequence had been just a little underwhelming owing to their midrange focus.

The launch of “Big Navi” modified all that, nevertheless it’s wanting like NVIDIA’s subsequent era of GPUs can be even larger and extra beastly than Ampere regardless of being named after a high-class woman. According to rumors, AMD plans to reply in variety, with a fair larger Navi GPU that goals to go face to face in opposition to Lady Lovelace.

The largest GPU within the Navi 3x household will most likely be generally known as Navi 31—or somewhat, most likely is already identified that approach inside AMD. Expectations for Navi 31 had been extraordinarily excessive, however have been tempered barely with up to date data a few months in the past. Shortly after that, it got here out that Navi 31 may very well increase the reminiscence bus by 50% in comparison with Navi 21. That’s the GPU used within the RX 6800 and all bigger launched Radeons.
A small snippet of the patch to the AMDGPU Linux driver.

The newest data appears to verify that rumor. As a part of the exact same update to its Linux drivers that we checked out on Monday, AMD itself has leaked what appears to be the reminiscence configuration of its top-end RDNA 3 GPU, presumably the chip behind the Radeon RX 7900 XT. That configuration: six 64-bit MCDs, every with 32MB of SRAM, for a large 384-bit reminiscence bus and a few 192 MB of Infinity Cache.

If you are questioning what an MCD is, it is a separate die that features cache, a GDDR6 reminiscence interface, and presumably exterior I/O for an RDNA 3 GPU. If you’ve got been actually out of the loop these days, AMD’s confirmed that its next-gen Radeons can be constructed utilizing chiplets like its Ryzen CPUs.
@Kepler_L2 on Twitter

Many folks have envisioned a GPU with a number of chiplets being tough to construct owing to the problem of splitting up a graphics workload throughout discrete processors, nevertheless it’s seeming extra possible that AMD will stay utilizing a single GPU compute chiplet with a number of cache, reminiscence, and I/O chiplets. That’s a a lot simpler configuration to handle, even when it does not give the identical advantages for manufacturing as a multi-die GPU.
This data was identified by Kepler on Twitter, who additionally had some attention-grabbing observations to make relating to the Infinity Cache allotment on RDNA 3 GPUs. As with RDNA 2, it appears to be roughly 16MB of Infinity Cache per 32-bit reminiscence channel, at the very least at a most. However, Kepler appears to suppose that AMD is ready to double that allotment utilizing 3D V-Cache. By stacking a second 32 MB SRAM die on prime of every MCD, the most important Navi 3x components might find yourself with as a lot as 384 MB of Infinity Cache.
RDNA 3 household guesswork by @Olrak29_ on Twitter.

It’s wonderful to consider a GPU with 384 MB of on-package cache when it wasn’t all that way back that we had been utilizing GPUs with lower than 1GB of whole VRAM on the board. A large cache like that ought to definitely alleviate the efficiency issues that extant RDNA 2 GPUs undergo when working in very excessive resolutions like UHD 4K.